Strategy, product & system architecture
PhD from EPFL. Research spans computer architecture and heterogeneous-system co-optimization, with experience in CPU microarchitecture, AI accelerator system modeling and LLM inference energy efficiency.
ABOUT VELOXIS AI
From compute IP delivery to edge accelerator products.
Hangzhou VELOXIS AI develops an in-house GPNPU architecture for AI inference. FusionCore, ScaleNoC and TileFlow form one technology stack that supports AI compute/interconnect IP and the VLX accelerator family.
TEAM
Core team & collaborators
From architecture and silicon engineering to compiler systems, the team covers the full implementation chain.
Chip architecture, compiler & system software
PhD from UCSD and doctoral supervisor at Zhejiang University. Focused on AI chip architecture, near-memory computing, mixed-precision computing and on-chip interconnect; leads the technology roadmap and development of core modules including FusionCore.
Silicon engineering & verification
Master's degree in Integrated Circuit Engineering from Tsinghua University, with experience in RTL, synthesis, physical implementation, PPA analysis and tape-out across multiple process nodes. Responsible for chip architecture and engineering verification.
Long-term architecture, low-power & quantization review
PhD from the University of Michigan and professor at Zhejiang University. Research includes design automation, low-power chips and design-manufacturing co-optimization; participates in long-term technology roadmap and architecture reviews.
Engineering and operations staff cover compilers, physical implementation, signoff and tape-out, project management and customer delivery, providing direct mentorship for engineering growth.
WHAT WE BUILD
One architecture, two business lines.
Reuse compute, interconnect, compiler and validation assets from chip projects through device products.
AI Compute & Interconnect IP
Provides FusionCore compute IP, ScaleNoC interconnect IP, subsystems and custom design services.
GPNPU Chips & Accelerator Cards
Advances VLX-64 accelerators and engineering modules, with VLX-512 as the future high-capacity roadmap.
MILESTONES
Company updates
Qwen-8B completes end-to-end validation on the FPGA prototype
Technology updateCompany completed a tens-of-millions RMB angel round
CompanyHangzhou VELOXIS AI was founded
Join the teamWORK WITH US
Advancing edge compute with industry partners.
Working with chip companies, device makers and software teams on IP delivery, chip integration and product deployment.